1. Field of the Invention
The present invention relates to a data transfer device and a data transfer method for transferring data with low power consumption.
2. Description of the Related Art
Dynamic power consumption (P) of a data transfer line is generally expressed by the expression: EQU P=fCV.sup.2
where f is the number of times of charge and discharge, C is a load capacitance, and V is a voltage applied to the load capacitance. But structures are adopted as data transfer lines in many integrated circuits for processing data for simplification of internal structures. However, since the bus is long and a number of resources are connected to the bus, the load capacitance of the bus is large in many cases. This results in an increase in power consumption.
Japanese Laid-Open Patent Publication No. 4-128914 discloses a data transfer device for reducing the load capacitance of an internal bus. In the data transfer device, the internal bus is divided into two parts: a main data bus and an input/output bus. The main data bus and the input/output data bus are connected to each other via a bidirectional buffer only when data is output to the exterior of the integrated circuit.
However, the external bus has a remarkably larger load capacitance than that of the internal bus. This is because while the internal bus of the integrated circuit has a line width of a micrometer order and a line length of a millimeter order, the external bus which is connected to a terminal of the integrated circuit has a line width of a millimeter order and a line length of a centimeter order. Therefore, in kinds of integrated circuits which should transfer data to the exterior of the integrated circuits, power, which is consumed at the terminal, increases. As described above, the integrated circuit suffers from a problem that a remarkable reduction in the consumption power cannot be expected only by reducing the load capacitance of the internal bus.